MOTOR CONTROL FPGA IP

The QDESYS Motor Control FPGA IP is a AMD Vivado IP Integrator library designed to simplify the creation of motor control systems based on AMD FPGAs.

The IP core consists of several small functional blocks that implement the required mathematical and logical operations, including storage for working data.

The mosysfoc is a high-level solution with an AXI4-Lite interface, enabling easy connection to MicroBlaze, Zynq, ZynqMP microcontrollers, and custom AXI-Master IPs.

The motorfoc is a bus-free solution with direct access to the core signals.

A unified IP interface is defined to connect power-board-specific IPs and the real-time data logger.