POWER BOARD FPGA IP

The Power Board FPGA IP implements the hardware control features and provides the interface to the Motor Control Core.

• Analog acquisition of motor phase currents and voltages
• Analog acquisition of DC-link current and voltage
• Analog acquisition from various temperature sensors: power-stage temperature, motor temperature, etc.
• Interface to the gate drive unit, including dead-time generation
• Rotor-position sensor acquisition: digital Hall sensors, incremental encoder, analog resolver
• System monitoring and dedicated protection functions
• Fan controllers for the local power stage and external cooling systems
• External I/O interface: safety cut-off input, alarm output

These features can be extended or modified depending on the specific capabilities of the power board.

QDESYS offers the development of this IP as a design service tailored to customer requirements.