MOTOR CONTROL FPGA FEATURES

Our motor control software is designed to run on AMD FPGAs and to achieve outstanding performance with high-speed, high-performance motors.

HIGHEST SPEED

PMSM control in sensorless mode tested at over 500 krpm.

CONTROL CYCLE

The Field-Oriented Control cycle time reaches 3.2 μs at 50 MHz and 1.6 μs at 100 MHz.

MULTI MOTORS

Multi-motor control within a single FPGA, minimizing synchronization delays and reducing system cost.

RPFM MODULATOR

Reduced EMI thanks to modulation-frequency spreading and DC-link evaluation at every FOC cycle.

FAST CYCLE

The RPFM modulator lowers latency from the mathematical layer to the physical layer, reducing the effective execution time of the entire current-control loop.

MULTI LEVEL

Multi-level modulation implemented through the RPFM modulator increases voltage and angle resolution while reducing current ripple at low modulation indices.

IP H/W PROTECTION

The physical layer is protected against overload through a fast analog acquisition system. Over-current protection monitors phase currents, the current vector, and the DC-link current.

IP LIFE CYCLE

The motor-control IP consists of a common core and a separate physical layer IP. High core reusability simplifies maintenance, while isolating the physical layer ensures flexibility for systems from a few watts to high-power platforms.

DYNAMIC RECONFIGURATION

All alternative IPs—such as modulators and rotor-position blocks—can be selected on the fly through software-controlled multiplexers. All sub-modules can be dynamically configured according to operating conditions.

ZERO S/W

Zero-software applications implemented entirely in HDL/HLS using Vivado, Vivado HLS®, or MATLAB HDL Coder.

S/W ARCHITECTURE

Application software ranges from bare-metal implementations to multi-threaded solutions running on Linux or QNX.

MULTI PROCESSING

From VHDL and HLS to MicroBlaze® and ARM Cortex-R/A architectures, the FPGA platform is ideal for distributed computation under mixed real-time constraints.